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| d a t a sh eet product speci?cation supersedes data of 1996 jun 04 file under integrated circuits, ic01 1996 oct 21 integrated circuits TDA1309H low-voltage low-power stereo bitstream adc/dac
1996 oct 21 2 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H features low power low supply voltage (2.7 v) integrated high-pass filter to cancel dc offset (adc) analog loop-through function multiple digital input/output formats possible 256f s system clock frequency several power-down modes digital de-emphasis (dac) overload detector to enable automatic recording level adjustment (adc) input pads suitable for 5.5 v; low supply voltage interfacing high dynamic range dac requires only one capacitor for post-filtering small 44-pin quad flat pack with 0.8 mm pitch 256f s system clock frequency in analog-to-digital (ad) and digital-to-analog (da) mode choice of three system clock frequencies (192f s , 256f s or 384f s ) in da mode. application portable digital audio equipment. general description the TDA1309H is a single chip stereo analog-to-digital and digital-to-analog converter employing bitstream conversion techniques. the low voltage requirement makes the device eminently suitable for use in low-voltage low-power portable digital audio equipment which incorporates recording and playback functions. ordering information type number package name description version TDA1309H qfp44 plastic quad ?at package; 44 leads (lead length 1.3 mm); body 10 10 1.75 mm sot307-2 1996 oct 21 3 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H quick reference data v ddd =v dda =v ddo =v ddd(f) =3v; v ssd =v ssa =v sso =v ssd(f) =0v; t amb =25 c; full scale sine wave input; mode 1; f i = 1 khz; 16-bit input data; conversion rate = 44.1 khz; measurement bandwidth = 10 hz to 20 khz; unless otherwise speci?ed. notes 1. the input voltage for full scale digital output is a function of v dda(ad) . 2. at full scale digital input; no de-emphasis; v o(rms) is a function of v dda(da) . 3. 18-bit input data. symbol parameter conditions min. typ. max. unit supply v dda(ad) adc analog supply voltage (pin 8) 2.7 3.0 4.0 v v dda(da) dac analog supply voltage (pin 25) 2.7 3.0 4.0 v v ddo operational ampli?ers supply voltage (pin 19) 2.7 3.0 4.0 v v ddd adc and dac digital supply voltage (pin 28) 2.7 3.0 4.0 v v ddd(f) digital ?lters supply voltage (pin 34) 2.7 3.0 4.0 v i dda(ad) adc analog supply current (pin 8) - 8 12.5 ma i dda(da) dac analog supply current (pin 25) - 3.5 7 ma i ddo operational ampli?ers supply current (pin 19) - 12 18 ma i ddd adc and dac digital supply current (pin 28) - 0.2 0.5 ma i ddd(f) digital ?lters supply current (pin 34) - 20 30 ma i pd(da) dac power-down current - 15 20 ma i pd(ad) adc power-down current - 710ma t amb operating ambient temperature - 20 - +75 c analog-to-digital converter v i(rms) input voltage (rms value) note 1 - 0.5 0.54 v (thd + n)/s total harmonic distortion plus noise-to-signal ratio at 0 db -- 85 - 80 db at - 60 db; a-weighted -- 35 - 30 db s/n idle channel signal-to-noise ratio v i = 0 v; a-weighted 90 95 - db a cs channel separation - 90 - db digital-to-analog converter v o(rms) output voltage (rms value) note 2 0.43 0.5 0.57 v (thd + n)/s total harmonic distortion plus noise-to-signal ratio at 0 db -- 90 - 82 db at - 60 db; a-weighted -- 38 - 34 db at - 60 db; a-weighted; note 3 -- 44 - db s/n idle channel signal-to-noise ratio code 0000h; a-weighted - 104 - db a cs channel separation 90 100 - db 1996 oct 21 4 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H block diagram b ook, full pagewidth mge766 4.7 k w 4.7 k w 4.7 k w 4.7 k w 1.5 k w 1.5 k w 1.5 k w 1.5 k w 750 w 750 w 47 m f 0.22 m f 0.22 m f 47 m f 0.22 m f 2.2 nf 2.2 nf 330 pf 330 pf 27 k w 10 m f 0.22 m f vm vm dac digital filter digital filter dac digital interface digital interface mode select adc adc current reference 14 15 42 1 41 6 36 32 31 35 29 5 39 28 27 23 24 18 22 21 19 20 26 25 33 34 30 3 42 43 44 37 38 40 9 11 12 13 10 16 7 8 17 ad ref bair baor ovload adenb adws adbck adsda adpon anlptr daws dabck dasda dapon v ss(i/o) v ddd v ssd dacr v or analog output v or da ref analog input v ir v ol dacl analog output v ol v sso v ddo v ssa(da) v dda(da) v ssd(f) v ddd(f) dadem mode0 mode1 mode2 clkedge test0 test1 sysclk v ref(neg) v ref(pos) baol bail v ref v dda(ad) analog input v il v ssa(ad) v dda(ad) i ref i dac TDA1309H supply decoupling on pins 19, 25, 28 and 34; 0.22 m f (ceramic), 47 m f (electrolytic). capacitance at pin 11 should be close to pins 11 and 9. fig.1 block diagram. 1996 oct 21 5 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H pinning symbol pin description adbck 1 adc input bit clock; 32f s or 64f s adws 2 adc word select input at f s mode0 3 adc/dac mode select input adenb 4 adc serial data enable input (active high) ovload 5 adc output overload ?ag (active low) adpon 6 adc power-on-mode input (active high) v ssa(ad) 7 adc analog ground supply voltage v dda(ad) 8 adc analog supply voltage v ref(neg) 9 adc negative reference voltage input (ground) v ref 10 adc decoupling capacitor v ref(pos) 11 adc positive reference voltage decoupling capacitor baol 12 adc input ampli?er output left bail 13 adc input ampli?er virtual ground left bair 14 adc input ampli?er virtual ground right baor 15 adc input ampli?er output right ad ref 16 adc decoupling capacitor i ref 17 adc/dac reference current resistor input da ref 18 dac decoupling capacitor v ddo 19 adc/dac operational ampli?er supply voltage v sso 20 adc/dac operational ampli?er ground supply voltage v ol 21 dac output voltage left dacl 22 dac output current left dacr 23 dac output current right v or 24 dac output voltage right v dda(da) 25 dac analog supply voltage v ssa(da) 26 dac analog ground supply voltage v ssd 27 adc/dac digital ground supply voltage v ddd 28 adc/dac digital supply voltage dapon 29 dac power-on-mode input (active high) dadem 30 dac digital de-emphasis input (active high) dabck 31 dac input bit clock; 32f s , 48f s or 64f s daws 32 dac word select input at f s v ssd(f) 33 adc/dac digital ?lters ground supply voltage v ddd(f) 34 adc/dac digital ?lters supply voltage dasda 35 dac serial data input anlptr 36 adc/dac analog loop-through input (active high) test0 37 adc/dac enable test mode 0 input (low is normal mode) test1 38 adc/dac enable test mode 1 input (low is normal mode) v ss(i/o) 39 adc/dac digital input/output ground supply voltage sysclk 40 adc/dac system clock input (f sys = 256f s ; dac also 192f s and 384f s ) 1996 oct 21 6 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H adsda 41 adc serial data output mode1 42 adc/dac mode 1 select input mode2 43 adc/dac mode 2 select input clkedge 44 adc/dac input bit clock rising/falling edge symbol pin description fig.2 pin configuration. handbook, full pagewidth 1 2 3 4 5 6 7 8 9 10 11 33 32 31 30 29 28 27 26 25 24 23 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 TDA1309H mge765 v ssd(f) daws dabck dadem v ddd v ssd v ssa(da) v dda(da) v or dacr adbck adws mode0 adenb ovload adpon v dda(ad) v ref(neg) v ref(pos) dapon mode2 mode1 adsda sysclk v ss(i/o) test1 anlptr dasda v ddd(f) clkedge test0 bail bair baor ad ref i ref da ref v sso v ol dacl baol v ddo v ssa(ad) v ref 1996 oct 21 7 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H functional description figure 1 illustrates the various components of the TDA1309H. the analog-to-digital converter is a bitstream type converter, both channels are sampled simultaneously. the digital-to-analog converter is a bcc (bitstream continuous calibration) type converter. the digital filter for the adc is a bit serial iir filter that produces a fairly linear phase response up to 15 khz. a high-pass filter is incorporated in the down-sampling path to remove dc offsets. an overload detection circuit is incorporated to facilitate automatic recording level adjustment. the digital up-sample filter for the dac is partly iir, with virtual linear phase response up to 15 khz, and partly fir. a switchable digital de-emphasis circuit is also incorporated. due to the bcc principle used, the dac needs only single pole post-filtering (one external capacitor) to meet the out-of-band suppression requirement. the adc and dac channels have separate power-down modes, to reduce power if one of them is not in use. an analog loop-through function enables analog-input analog-output mode without using the adc and dac converters or filters, thereby switching them off to reduce power consumption. the digital interfaces accommodates, 16 and 18-bit, i 2 s-bus and lsb justified formats. the adc digital output can be made 3-state by means of the adenb signal, this enables the use of a digital bus. the TDA1309H interface accommodates slave mode only, therefore, the system ics must provide the system clock, bit clock and word clock signals. for the dac, the TDA1309H accepts the data together with these clocks, for the adc it delivers the data in response to these clocks. within one stereo frame, the first sample always represents the left channel. when sending data the unused bit positions are set to zero, when receiving data these bit positions are don't cares. to accommodate the various interface formats and system clock frequencies four control pins are provided, mode0 to mode2 for mode selection and clkedge which selects the active edge of the bck signal. table 1 gives the interface mode selection, fig.3 illustrates the adc/dac data formats and fig.5 the operating modes. the section of the TDA1309H is designed to accommodate two main modes: 1. the 256f s mode in which analog-to-digital and digital-to-analog can be used 2. the 192f s or 384f s mode (digital-to-analog only). table 1 interface mode selection note 1. only digital-to-analog. table 2 clock edge mode device pin adc/dac formats mode 2 mode 1 mode 0 type bits bck sys; f sys figure 0 0 0 lsb justi?ed 16 32f s 256f s 3(a) 0 0 1 lsb justi?ed 16 64f s 256f s 3(b) 0 1 0 lsb justi?ed 16 48f s 192f s (1) 4(a) 0 1 1 lsb justi?ed 18 64f s 256f s 3(c) 100i 2 s-bus 16 32f s 256f s 3(d) 101i 2 s-bus 16 64f s 256f s 3(e) 110i 2 s-bus 16 48f s 384f s (1) 4(b) 111i 2 s-bus 18 64f s 256f s 3(f) clkedge valid edge of bck adc dac 0 falling rising 1 rising falling 1996 oct 21 8 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H fig.3 dac and adc data formats (continued in fig.4). handbook, full pagewidth mge767 bck ws sda bck ws sda bck ws sda bck ws sda bck ws sda bck ws sda lsb msb left lsb msb right left right left right left right left right left right lsb msb lsb msb lsb msb lsb msb lsb msb lsb lsb msb lsb msb lsb msb msb lsb msb lsb msb lsb msb lsb msb lsb i 2 s 64f s 18-bit i 2 s 64f s 16-bit i 2 s 32f s 16-bit lsb justified 64f s 18-bit lsb justified 64f s 16-bit lsb justified 32f s 16-bit (a) (b) (c) (d) (e) (f) 1996 oct 21 9 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H there are different modes in which the TDA1309H can operate. these modes can be selected as shown in table 3 and fig.5. in mode a, the digital filters clock is switched off. switching over to one of the adc active modes (b, c or d) initiates a reset sequence of the digital filters. this mode should be activated immediately after power-on for at least 2 clock periods. table 3 operating mode selection note 1. x = dont care. mode description device pin logic anlptr adpon dapon a not used 0 0 0 b record and playback 0 1 1 c record only 0 1 0 d record and analog loop-through 1 1 0 e analog loop-through 1 0 0 f playback only 0 0 1 g and h reserved 1 x (1) 1 fig.4 dac and adc data formats (continued from fig.3). handbook, full pagewidth bck ws sda bck ws sda lsb msb lsb msb lsb msb lsb msb lsb msb left left right right lsb justified 48f s 16-bit i 2 s 48 fs 16-bit (a) (b) mge768 1996 oct 21 10 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H fig.5 schematic diagram of operating modes. handbook, full pagewidth mge771 mode b analog input adc analog adc digital filter adc analog adc digital filter adc analog adc digital filter analog output digital input dac analog dac digital filter dac analog dac digital filter mode c analog input digital output digital output mode d analog input analog output mode e analog input analog output mode f analog output digital input digital output 1996 oct 21 11 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H limiting values in accordance with the absolute maximum rating system (iec 134). notes 1. human body model: c = 100 pf; r = 1.5 k w ; 3 zaps positive and 3 zaps negative. 2. machine model: c = 200 pf; l = 0.5 m h; r = 10 w ; 3 zaps positive and 3 zaps negative. thermal characteristics quality specification in accordance with snw-fq-611e . the number of this quality specification can be found in the quality reference handbook . the handbook can be ordered using the code 9397 750 00192. symbol parameter conditions min. max. unit v dda(ad) analog supply voltage (pin 8) - 4.5 v v dda(da) analog supply voltage (pin 25) - 4.5 v v ddo operational ampli?ers supply voltage (pin 19) - 4.5 v v ddd digital supply voltage (pin 28) - 4.5 v v ddd(f) digital ?lters supply voltage (pin 34) - 4.5 v d v dd maximum supply voltage difference - 100 mv d v ss maximum ground supply voltage difference - 100 mv v i maximum input voltage - 0.5 v dd + 0.5 v i ik dc clamp input diode current v i < - 0.5 v or v i >v dd + 0.5 v - 10 ma i ok dc output clamp diode current; (output type 2 ma) v o < - 0.5 v or v o >v dd + 0.5 v - 10 ma t stg storage temperature - 65 +150 c t amb operating ambient temperature - 20 +75 c v es electrostatic handling note 1 - 1500 +1500 v note 2 - 300 +300 v symbol parameter value unit r th j-a thermal resistance from junction to ambient in free air 60 k/w 1996 oct 21 12 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H characteristics v ddd =v dda =v ddo =v ddd(f) =3v; v ssd =v ssa =v sso =v ssd(f) =0v; t amb =25 c; full scale sine wave input; mode 1; f i = 1 khz; 16-bit input data; conversion rate = 44.1 khz; measurement bandwidth = 10 hz to 20 khz; unless otherwise speci?ed. symbol parameter conditions min. typ. max. unit supply v dda(ad) adc analog supply voltage (pin 8) 2.7 3.0 4.0 v v dda(da) dac analog supply voltage (pin 25) 2.7 3.0 4.0 v v ddo operational ampli?ers supply voltage (pin 19) 2.7 3.0 4.0 v v ddd adc/dac digital supply voltage (pin 28) 2.7 3.0 4.0 v v ddd(f) digital ?lters supply voltage (pin 34) 2.7 3.0 4.0 v i dda(ad) adc analog supply current (pin 8) - 8 12.5 ma adc power-down - 0.3 1 ma i dda(da) dac analog supply current (pin 25) - 3.5 7 ma dac power-down - 1.4 2 ma i ddo operational ampli?ers supply current (pin 19) - 12 18 ma dac power-down - 5.5 9 ma adc power-down - 711 ma adc/dac power-down - 0 - ma i ddd adc/dac digital supply current (pin 28) - 0.2 0.5 ma i ddd(f) digital ?lters supply current (pin 34) - 20 30 ma dac power-down - 15 20 ma adc power-down - 710 ma i ddd(f)q digital ?lters quiescent current -- 100 m a 1996 oct 21 13 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H analog-to-digital converter v i(rms) input voltage (rms value) note 1 - 0.5 0.54 v i i input current (pins 13 and 14) -- 10 na d v o unbalance between channels -- 0.3 db res resolution 16-bit format - 16 - bits 18-bit format - 18 - bits (thd + n)/s total harmonic distortion plus noise-to-signal ratio at 0 db -- 85 - 80 db at - 20 db -- 75 - db at - 60 db; a-weighted -- 35 - 30 db s/n idle channel signal-to-noise ratio v i = 0 v; a-weighted 90 95 - db a cs channel separation - 90 - db psrr power supply rejection ratio note 2 -- 30 - db digital-to-analog converter v o(rms) output voltage (rms value) note 3 0.43 0.5 0.57 v d v o unbalance between channels - 0.1 - db r l load resistance 5 -- k w c l load capacitance note 4 -- 200 pf res resolution 16-bit format - 16 - bits 18-bit format - 18 - bits (thd + n)/s total harmonic distortion plus noise-to-signal ratio at 0 db -- 90 - 82 db at - 20 db -- 75 - db at - 60 db; a-weighted -- 38 - 34 db at - 60 db; a-weighted; note 5 -- 44 - db s/n idle channel signal-to-noise ratio code 0000h; a-weighted - 104 - db a cs channel separation 90 100 - db psrr power supply rejection ratio note 2 -- 30 - db analog loop-through (mode e) (thd + n)/s total harmonic distortion plus noise-to-signal ratio at 0 db -- 85 - db s/n idle channel signal-to-noise ratio v i = 0 v; a-weighted - 95 - db g ltr loop-through gain note 1 -- 1.1 - db e os dc offset error - 1.0 - mv symbol parameter conditions min. typ. max. unit 1996 oct 21 14 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H analog-to-digital decimation ?lter f s(o) output sample frequency 28 44.1 54 khz f s(i) input sample frequency - 128f s - f sys system clock frequency 256f s - 256f s b signal bandwidth f s(o) = 44.1 khz 0.02 - 20 khz a sup aliasing suppression f s(o) - b 1996 oct 21 15 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H notes 1. v i for full scale digital output is a function of v dda(ad) , 0.5 v (rms) (at 3 v the digital voltages are equivalent to - 1.1 db in the digital domain). 2. v ripple = 1% of the supply voltage and f ripple = 100 hz. 3. at full scale digital input; no de-emphasis; v o(rms) is a function of v dda(da) . 4. for a load capacitance greater than 33 pf a series resistor of 200 w is recommended. 5. 18 bits input data. 6. the aliasing suppression frequency is mirrored around 128f s . 7. v dda = 3 v; indicated digital level is with respect to - 1.1 db (no overload). 8. all digital voltages = 2.7 to 4.0 v; all ground supply voltages = 0 v; t amb = - 20 to +75 c. timing b it clock (bck) related signals (see fig.6); clkedge = 0 t cy clock period 300 -- ns t hc clock high time 100 -- ns t lc clock low time 100 -- ns t r rise time -- 20 ns t f fall time -- 20 ns t suws set-up time ws to rising edge of bck 20 -- ns t hws hold time ws to rising edge of bck 0 -- ns t suda set-up time sda (dac) to rising edge of bck 20 -- ns t hda hold time sda (dac) to rising edge of bck 0 -- ns t had hold time sda (adc) to falling edge of bck 0 -- ns t dad delay time sda (adc) to falling edge of bck -- 80 ns s ystem clock (sysclk) related signals (see fig.7) t cy clock period 72 -- ns t hc clock high time 22 -- ns t lc clock low time 22 -- ns t r rise time -- 10 ns t f fall time -- 10 ns symbol parameter conditions min. typ. max. unit 1996 oct 21 16 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H fig.6 serial timing of bck related signals. handbook, full pagewidth mge769 t hc t lc t cy t r t f t suws t hws t suda t hda t dad t had v h v l clkedge = 1 clkedge = 0 bck ws (lrck) sda (dac) sda (adc) 1996 oct 21 17 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H fig.7 serial timing of sysclk related signals. handbook, full pagewidth mge770 t hc t lc t cy t r t f sysclk 1996 oct 21 18 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H package outline unit a 1 a 2 a 3 b p ce (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec eiaj mm 0.25 0.05 1.85 1.65 0.25 0.40 0.20 0.25 0.14 10.1 9.9 0.8 1.3 12.9 12.3 0.85 0.75 1.2 0.8 10 0 o o 0.15 0.1 0.15 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.95 0.55 sot307-2 92-11-17 95-02-04 d (1) (1) (1) 10.1 9.9 h d 12.9 12.3 e z 1.2 0.8 d e e b 11 c e h d z d a z e e v m a x 1 44 34 33 23 22 12 y q a 1 a l p q detail x l (a ) 3 a 2 pin 1 index d h v m b b p b p w m w m 0 2.5 5 mm scale qfp44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm sot307-2 a max. 2.10 1996 oct 21 19 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H soldering introduction there is no soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. however, wave soldering is not always suitable for surface mounted ics, or for printed-circuits with high population densities. in these situations reflow soldering is often used. this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our ic package databook (order code 9398 652 90011). re?ow soldering reflow soldering techniques are suitable for all qfp packages. the choice of heating method may be influenced by larger plastic qfp packages (44 leads, or more). if infrared or vapour phase heating is used and the large packages are not absolutely dry (less than 0.1% moisture content by weight), vaporization of the small amount of moisture in them can cause cracking of the plastic body. for more information, refer to the drypack chapter in our quality reference handbook (order code 9398 510 63011). reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several techniques exist for reflowing; for example, thermal conduction by heated belt. dwell times vary between 50 and 300 seconds depending on heating method. typical reflow temperatures range from 215 to 250 c. preheating is necessary to dry the paste and evaporate the binding agent. preheating duration: 45 minutes at 45 c. wave soldering wave soldering is not recommended for qfp packages. this is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. if wave soldering cannot be avoided, the following conditions must be observed: a double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. the footprint must be at an angle of 45 to the board direction and must incorporate solder thieves downstream and at the side corners. even with these conditions, do not consider wave soldering the following packages: qfp52 (sot379-1), qfp100 (sot317-1), qfp100 (sot317-2), qfp100 (sot382-1) or qfp160 (sot322-1). during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. maximum permissible solder temperature is 260 c, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 c within 6 seconds. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. repairing soldered joints fix the component by first soldering two diagonally- opposite end leads. use only a low voltage soldering iron (less than 24 v) applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c. 1996 oct 21 20 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale.2 data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation. 1996 oct 21 21 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H notes 1996 oct 21 22 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H notes 1996 oct 21 23 philips semiconductors product speci?cation low-voltage low-power stereo bitstream adc/dac TDA1309H notes internet: http://www.semiconductors.philips.com philips semiconductors C a worldwide company ? philips electronics n.v. 1996 sca52 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. +63 2 816 6380, fax. +63 2 817 3474 poland: ul. lukiska 10, pl 04-123 warszawa, tel. +48 22 612 2831, fax. +48 22 612 2327 portugal: see spain romania: see italy russia: philips russia, ul. usatcheva 35a, 119048 moscow, tel. +7 095 247 9145, fax. +7 095 247 9144 singapore: lorong 1, toa payoh, singapore 1231, tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 7430 johannesburg 2000, tel. +27 11 470 5911, fax. +27 11 470 5494 south america: rua do rocio 220, 5th floor, suite 51, 04552-903 s?o paulo, s?o paulo - sp, brazil, tel. +55 11 821 2333, fax. +55 11 829 1849 spain: balmes 22, 08007 barcelona, tel. +34 3 301 6312, fax. +34 3 301 4107 sweden: kottbygatan 7, akalla, s-16485 stockholm, tel. +46 8 632 2000, fax. +46 8 632 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. +41 1 488 2686, fax. +41 1 481 7730 taiwan: philips taiwan ltd., 23-30f, 66, chung hsiao west road, sec. 1, p.o. box 22978, taipei 100, tel. +886 2 382 4443, fax. +886 2 382 4444 thailand: philips electronics (thailand) ltd., 209/2 sanpavuth-bangna road prakanong, bangkok 10260, tel. +66 2 745 4090, fax. +66 2 398 0793 turkey: talatpasa cad. no. 5, 80640 gltepe/istanbul, tel. +90 212 279 2770, fax. +90 212 282 6707 ukraine : philips ukraine, 4 patrice lumumba str., building b, floor 7, 252042 kiev, tel. +380 44 264 2776, fax. +380 44 268 0461 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. +44 181 730 5000, fax. +44 181 754 8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. +1 800 234 7381 uruguay: see south america vietnam: see singapore yugoslavia: philips, trg n. pasica 5/v, 11000 beograd, tel. +381 11 625 344, fax.+381 11 635 777 for all other countries apply to: philips semiconductors, marketing & sales communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 34 waterloo road, north ryde, nsw 2113, tel. +61 2 9805 4455, fax. +61 2 9805 4466 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 1 60 101, fax. +43 1 60 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 200 733, fax. +375 172 200 773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 689 211, fax. +359 2 689 102 canada: philips semiconductors/components, tel. +1 800 234 7381 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: prags boulevard 80, pb 1919, dk-2300 copenhagen s, tel. +45 32 88 2636, fax. +45 31 57 1949 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615800, fax. +358 9 61580/xxx france: 4 rue du port-aux-vins, bp317, 92156 suresnes cedex, tel. +33 1 40 99 6161, fax. +33 1 40 99 6427 germany: hammerbrookstra?e 69, d-20097 hamburg, tel. +49 40 23 53 60, fax. +49 40 23 536 300 greece: no. 15, 25th march street, gr 17778 tavros/athens, tel. +30 1 4894 339/239, fax. +30 1 4814 240 hungary: see austria india: philips india ltd, shivsagar estate, a block, dr. annie besant rd. worli, mumbai 400 018, tel. +91 22 4938 541, fax. +91 22 4938 722 indonesia: see singapore ireland: newstead, clonskeagh, dublin 14, tel. +353 1 7640 000, fax. +353 1 7640 200 israel: rapac electronics, 7 kehilat saloniki st, tel aviv 61180, tel. +972 3 645 0444, fax. +972 3 649 1007 italy: philips semiconductors, piazza iv novembre 3, 20124 milano, tel. +39 2 6752 2531, fax. +39 2 6752 2557 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108, tel. +81 3 3740 5130, fax. +81 3 3740 5077 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381 middle east: see italy printed in the netherlands 517021/1200/04/pp24 date of release: 1996 oct 21 document order number: 9397 750 00879 |
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